Learning objectives
The aim of the second module is to provide the theoretical basis and the practical skills required to design embedded hardware and firmware compliant with industrial standards (safety, interoperability, maintainability). In addition, model-based design and automatic code generation using Matlab/Simulink will be considered.
Prerequisites
Electronics fundamentals, coding fundamentals.
Course unit content
Embedded hardware and firmware design in compliance with industrial and safety standards, model-based design.
Full programme
Embedded hardware for compliant systems (1 hr)
Sensing, control, actuation, redundancy, power supply, insulation.
Structured approach to firmware design (2 hr)
V-model, levels of abstraction, validation, verification, documentation.
Real-time computing (3 hr)
Numerical approximation of functions and differential calculus, optimization.
Fixed-point ALUs (6 hr)
Fixed-point numeric formats, fixed-point arithmetic, normalized fractional format, computations with normalized quantities, examples (Ohm's law, magnetic flux observer for IMs), TDL structures, µC vs. DSP, fixed point numeric saturation.
Implementation: the building system (4 hr)
Source code, preprocessor, compiler, assembly language, machine code, internal operation of the CPU, registers, stack, assembler, linker, optimization.
Software testing and documentation (2 hr)
Unit testing, static and dynamic code analysis, code coverage, process documentation, inline documentation, Doxygen, authoring tools.
Version control systems (2 hr)
Concurrent development, centralized vs. distributed VCSs, SVN, GIT, repositories, update, commit, branching, tagging, merging.
Standards (1 hr)
Standardization organizations, operation, stage codes.
Safety standards (1 hr)
Introduction to safety standards, safety integrity levels, good programming practices.
Coding standards (2 hr)
Motivation, MISRA C, CERT C, Barr Group, rule examples.
Communication protocols (2 hr)
CAN, CANopen, J1939, introduction to industrial communication protocols.
Watchdogs (1 hr)
Timeout watchdog, windowed watchdog, hardware watchdog, independence, best practices.
Bootloaders (1 hr)
MCU vs. FPGA and SoC, MCU booting sequence, interrupt vector table relocation, OpenBLT.
Model-based design (2 hr)
Automatic code generation, model-in-the-loop, software-in-the-loop, processor-in-the-loop, rapid control prototyping.
Bibliography
Lecture notes, standards, and documentation of the software used.
