Learning objectives
Course learning objectives are to provide students with knowledge and understanding of fundamental techniques for digital system analysis and design. Both traditional methodologies suitable for paper and pencil and algorithmic techniques adopted in industrial Design Automation flows and CAD tools are presented. Emphasis is placed on the development of problem solving capabilities, including the ability to address design problems at high level by partitioning them into subproblems and exploiting the most appropriate components and techniques for individual subproblems.
At the end of the course, students will be able to directly apply the learned techniques in the following contexts:
- Analysis and design of small to medium combinational circuits using logic gate as well as LSI and MSI components;
- Analysis and design of small to medium synchronous sequential circuits using logic gates and flip-flops as well as functional modules such as registers, counters, memories;
- Analysis and design of small asynchronous sequential circuits; (given the specialized nature of the topic, the depth and skills gained for dealing with asynchronous sequential circuits will depend upon the amount of lecturing time left toward the end of the lecturing period);
- Ability to use basic CAD/CAE tools for programmable components-based digital design;
- Ability to use a problem solving approach to partition complex problems into manageable subproblems that can be individually tackled and solved.
Prerequisites
Knowledge of fundamental gates and Boolean algebra is assumed. Elementary techniques for combinational synthesis (K-maps, expression simplification) will be quickly recalled before delving into more advanced course topics.
Course unit content
Digital Design: Course Syllabus
- Introduction to digital systems
- Analysis and synthesis techniques for combinational circuits
- Analysis and synthesis techniques for synchronous sequential circuits
- Analysis and synthesis techniques for asynchronous sequential circuits
- Analysis and synthesis techniques for complex digital systems
- Laboratory activity: Digital design using programmable components with CAD/CAE tools
Full programme
__Digital Design: Detailed Course Syllabus__
Introduction to digital systems
1 - The role of digital systems. Digital representation of information.
2 - Von Neumann's architecture.
3 - Evolution of electronic technologies.
4 - Objectives and limitations of digital systems.
Combinational logic design
1 - Review: Canonical and general logic expressions (SoP and PoS). Analysis and synthesis of fully specified logic functions based on Karnaugh maps.
2 - Other two-level logic analysis and synthesis techniques: Incompletely specified logic functions. Multiple output circuits (multiple prime implicants/implicates method). Analysis and synthesis of NAND and NOR circuits.
3 - CAD tools for combinational network design: Quine-McCluskey algorithm. Espresso. Logic simulation.
4 - Multilevel logic and integrated circuit-based design: Expression factorization and decomposition. Combinational logic design based on standard MSI and LSI parts (Multiplexers, Decoders, Demultiplexers, Encoders, ROMs, AOI components).
5 - Interconnection technologies: Three-state gates, buffers, tranceivers, busses. Three-state based MUX and DEMUX implementation.
6 - Combinational programmable logic (ROM, PLA, PAL, GAL).
7 - Transient phenomena in combinational circuits: static and dynamic hazards.
Synchronous sequential logic design
1 - Mealy and Moore machines. Elementary logic circuits with delays and feedback. Fundamental mode operation. Clocked oepration.
2 - Basic memory elements: SR and D Latches; D, JK, and T Flip-Flops. Timing problems. Timing in synchronous circuits.
3 - Finite state automata: Automata description techniques (state diagrams, flow tables, description languages). State minimization.
4. Analysis and synthesis of synchronous sequential circuits: State encoding. Optimal and one-hot encodings. State memory implementation with Flip-Flops and Latches.
5 - The synchronous/asynchronous interface: Flip-Flops with Preset and Clear commands. Management of asynchronous and pulsed inputs in synchronous circuits.
6 - Counters and Registers: Design of binary counters, ring counters, Johnson counters, counters with arbitrary state encoding. Parallel registers and shift registers. Control inputs in counters and registers.
7 - Sequential programmable logic (CPLD, FPGA).
Asynchronous sequential logic design
1 - State diagrams and flow tables for asynchronous circuits. Fundamental mode operation and timing in asynchronous circuits.
2 - Analysis and synthesis of asynchronous sequential circuits.
3 - State minimization for asynchronous sequential circuits.
4 - State encoding: Critical races and functional hazard problems. Techniques and tools for critical races solution: adjacency graph, encoding map, multiple state transitions, multiple state assignments. Universal assignments.
5 - State realization by direct feedback and SR Latches.
6 - Asynchronous design of synchronous memory elements: D-Latch; SR, JK, and T Flip-Flops. Master-Slave Flip-Flop architecture. Essential hazard and ones-catching problems. Edge-Triggered Flip-Flop architecture. Integration of Preset and Clear inputs in Flip-Flops.
7 - Asynchronous control units.
Analysis and synthesis of complex digital systems
1 - Sequential circuit design using standard integrated circuits (registers, counters, shift-registers, sequencers, MUXes, etc.).
2 - Complex circuit design by decomposition into datapath and control unit. Control unit design.
3 - Data path components and dedicated combinational components: Arithmetic circuits (adders, comparators, ALU). Transocoders. Parity and Hamming circuitry. XOR-based circuits.
4 - Design techniques for pipelined circuits.
5 - Hardware description languages.
Digital system design using programmable components (Laboratory activity)
1 - Overview of industrial programmable components families and technologies
2 - Industry-standard CAD tools for digital design. Schematic entry. VHDL.
3 - Digital simulation. Mapping onto assigned programmable components.
Bibliography
Recommended textbooks:
Lecture notes and exercises with solutions are made available on the course web site to registered students.
For a comprehensive treatment of the subject please refer to the following textbooks, which the course draws inspiration from:
F. Vahid, Digital Design, John Wiley & Sons, 2007.
J.F. Wakerly, Digital Design: Principles and Practice, 4th Edition, Prentice-Hall, 2005.
Additional textbooks (to probe further specific subjects or to look for exercises):
C. Bolchini, C. Brandolese, F. Salice, D. Sciuto, Reti Logiche, Apogeo, 2004.
M.M. Mano, Digital Design, 3/E, Prentice Hall, 2002.
R.H. Katz, Contemporary Logic Design, 1st Edition, Addison Wesley, 1994.
R. Laschi, Reti Logiche, Esculapio, Bologna, 1994.
The course covers a very classical computer engineering discipline. Hence, a number of textbooks dealing with the subject are available in the Engineering School Library, in Italian as well as in English.
Teaching methods
The course includes about 80 hours of supervised learning activity (lectures and excercises in classroom as well as exercises and design activity in laboratory).
Most of the course involves lectures and exercises in classroom using chalkboard, overhead projector and/or computer slides as needed. A large fraction of time is reserved for the design activity, typically carried out on the main chalkboard to include design suggestions from the more lively students attending the class.
Laboratory classes (for about 6-10 hours) cover digital design with programmable logic components using industrial CAD tools. The following design steps are addressed in the labs: schematic entry, VHDL, digital simulation, project mapping on assigned programmable components.
During the semester, two midterms as well as a few exercise or theory home assignments are administered to keep students on pace with the course and exempt them from the final exam.
At the end of the course, a larger optional project involving programmable components is usually assigned (depending upon the availability of lecturing time at the end of course to launch the project). The project can be carried out as home assignment by groups of 2-4 students. The purpose of this assignment is to consolidate students' problem solving skills by leveraging upon their enthusiasm and gained confidence with digital design.
Assessment methods and criteria
Recommended mode: Two written midterms at half and end of lecturing period.
Otherwise: Comprehensive written test during an official exam sessions.
Written tests (as well as midterms) always include exercises with design and analysis of several types of digital circuits, covering all the course topics. Written tests may also include one or few quizzes about more theory-oriented topics. More frequently, theory must be known and used to solve the proposed design problems.
Optional home assignment only counts as possible improvement over a passing mark obtained with written midterms or test.
Other information
Course web site available at: http://didattica.unipr.it for registered students.
Teaching material is published on the web site as course progresses.
2030 agenda goals for sustainable development
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