Learning objectives
Knowledge and understanding
The purpose of the course to illustrate the basic mechanisms of operation of computing systems and in particular the interaction between the modules (CPU, memory, I / O) of a computer.
Applying knowledge and understanding
The student will acquire the ability to understand the basic functioning of modern CPUs.
Students completing the course will be able to write simple programs in Assembly.
Prerequisites
Course unit content
The purpose of the course is to give the students the basic concepts of the modern CPU architectures and computer systems. The course comprises the fundamental knowledge of the programming in language Assembly. The concepts are exposed in a general way; when necessary it is made directed reference the architecture of the INTEL CPU family. The main topics are: basic computer architecture, modern CPU architectures, memory functioning, I/O subsystem, Assembly programming.
Full programme
The course includes about 45 hours of lessons on the following topics (duration is indicative):
- course introdution, Turing machine; history of computers; Von Neumann architecture; Moore law; Amdhal law; (3 hours)
- Instruction Set Architecture; RISC and CISC; Intel CPU family; ARM CPU family; CPU microarchitecture; monocyle and multicycle CPU architectures; variants of the multicycle CPU; performance comparison; (6 hours)
- performance evaluation; benchmark; (1 hour)
- pipeline and hazards; superscalar architecture; (3 hours)
- characteristics of Assembly language; reference architecture for Assembly 8086; operands storage; 8086 registers: general registers; other registers; memory models; segmented memory; address modes; types of data; data transfer instructions; arithmetic instructions; control transfer instructions; function call; variable definition in Assembly; bit-wise instructions; data string instructions: flag control instructions; access to the strings of data; parameter exhange through the stack; (14 hours)
- exercises on memory alignment and ordering for the written exam; (2 hours)
- characteristics of the memories; memory hierarchy; SRAM, DRAM, SDRAM and DDR; permanent memories; memory-processor interface; MESI; virtual memory; (5 hours)
- memory-processor interface and exercises for the written exam; (4 hours)
- cache memories and exercises for the written exam; (4 hours)
- I/O interface; polling; interrupts; Intel 8259; DMAC; external memories; interconnection structures; (3 hours)
There will also be 18 hours in lab with the following schedule (indicative):
- introduction to the compiling tools; simple examples; debugging; (1 hour)
- various exercises and lab (17 hours);
Bibliography
- A.S. Tanenbaum e T. Austin, “Architettura dei Calcolatori: un approccio strutturale”, sesta ed., Pearson/Prentice Hall, 2013
- Giacomo Bucci, “Calcolatori elettronici – Architettura e organizzazione”, Mc Graw-Hill, 2009
- William Stallings, “Architettura e organizzazione dei calcolatori. Progetto e prestazioni”, ottava ed., Pearson Prentice-Hall, 2010
- Carl Hamacher, Zvonko Vranesic, Safwat Zaky, “Introduzione all'architettura dei calcolatori”, seconda ed., McGraw-Hill, 2007
Teaching methods
The course includes around 40 hours of traditional frontal lectures and 24 hours of training in the laboratory.
Assessment methods and criteria
The exam consists in two parts, which can be taken independently, in terms of both order and exam session. The first part consists in an oral examination made in written, with questions about the theory and an exercise. The second part is a practical exam in laboratory requiring to write a program in Assembly x86. The final grade will be the average of the two grades.
Other information
2030 agenda goals for sustainable development
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