DIGITAL DESIGN
cod. 1006623

Academic year 2017/18
3° year of course - First semester
Professor
Academic discipline
Sistemi di elaborazione delle informazioni (ING-INF/05)
Field
Ingegneria informatica
Type of training activity
Characterising
42 hours
of face-to-face activities
6 credits
hub: PARMA
course unit
in ITALIAN

Learning objectives

Course learning objectives are to provide students with knowledge and ability to apply fundamental techniques for digital system analysis and design.
Both traditional methodologies suitable for paper and pencil and algorithmic techniques adopted in industrial Design Automation flows are presented. Emphasis is placed on the development of problem solving capabilities, including the ability to address design problems at high level by partitioning them into subproblems and exploiting the most appropriate components and techniques for individual subproblems.

At the end of the course, students will be able to apply the following learned techniques:
- Analysis and design of small to medium combinational circuits using logic gates as well as LSI and MSI components;
- Analysis and design of small to medium synchronous sequential circuits using logic gates and flip-flops as well as functional modules such as registers, counters, memories;
- Selection and application of the memory elements adopted in synchronous sequential logics;
- Interfacing digital systems with external signals using latches and flip-flops;
- Behavioral and structural approaches in the design of digital systems, taking into account cost and performance issues;
- Ability to use a problem solving approach to partition complex problems into manageable subproblems that can be individually tackled and solved.

Prerequisites

Knowledge of fundamental gates, Boolean algebra and some basics of combinational synthesis is assumed. Elementary techniques for combinational synthesis (K-maps, expression simplification) will be quickly recalled before delving into more advanced course topics.

Course unit content

Digital Design: Course Syllabus

- Models of digital circuits
- Recall of elementary techniques for analysis and synthesis of combinational circuits
- Integrated combinational circuits: SSI, MSI, LSI, programmable circuits (ROM, PLA, PAL, GAL, CPLD)
- Analysis and synthesis techniques of combinational circuits using integrated and programmable components
- Bistable memory circuits
- Analysis and behavioral synthesis techniques for synchronous sequential circuits
- Integrated sequential circuits: registers, counters, sequential programmable components, memory banks
- Structural synthesis of sequential circuits using integrated components
- Analysis and synthesis techniques for complex digital systems

Full programme

__Digital Design: Detailed Course Syllabus__

Introduction to digital systems
1 - The role of digital systems. Digital representation of information.
2 - Von Neumann's architecture.
3 - Evolution of electronic technologies.
4 - Objectives and limitations of digital systems.

Combinational logic design
1 - Review: Canonical and general logic expressions (SoP and PoS). Analysis and synthesis of fully specified logic functions based on Karnaugh maps.
2 - Other two-level logic analysis and synthesis techniques: Incompletely specified logic functions. Multiple output circuits. Analysis and synthesis of NAND and NOR circuits.
3 - Multilevel logic and integrated circuit-based design: Expression factorization and decomposition. Combinational logic design based on standard integrated circuits. SSI logic family. MSI and LSI parts (Multiplexers, Decoders, Demultiplexers, Encoders, ROMs, AOI components).
4 - Interconnection technologies: Three-state gates, buffers, tranceivers, busses. Three-state based MUX and DEMUX implementation.
5 - Combinational programmable logic (ROM, PLA, PAL, GAL).
6 - Transient phenomena in combinational circuits: static and dynamic hazards.
7 (optional topic) - CAD tools for combinational network design: Quine-McCluskey algorithm. Espresso. Logic simulation.

Synchronous sequential logic design
1 - Mealy and Moore machines. Elementary logic circuits with delays and feedback. Fundamental mode operation. Clocked operation.
2 - Basic memory elements: SR and D Latches; D, JK, and T Flip-Flops. Timing problems. Timing in synchronous circuits.
3 - Finite state automata: Automata description techniques (state diagram, flow table, description language). State minimization.
4. Analysis and synthesis of synchronous sequential circuits: State encoding. Optimal and one-hot encodings. State memory implementation with Flip-Flops and Latches.
5 - The synchronous/asynchronous interface: Flip-Flops with Preset and Clear commands. Management of asynchronous and pulsed inputs in synchronous circuits.
6 - Counters and Registers: Design of binary counters, ring counters, Johnson counters, counters with arbitrary state encoding. Parallel registers and shift registers. Control inputs in counters and registers.
7 - Sequential programmable logic (CPLD, FPGA).

Analysis and synthesis of complex digital systems
1 - Sequential circuit design using standard integrated circuits (registers, counters, shift-registers, sequencers, MUXes, etc.).
2 - Memory banks design.
3 - Complex circuit design by decomposition into datapath and control unit. Control unit design.
4 - Data path components and dedicated combinational components: Arithmetic circuits (adders, comparators, ALU). Transocoders. Parity and Hamming circuitry. XOR-based circuits.
5 - Design techniques for pipelined circuits.
6 (argomento opzionale) - Hardware description languages.

Bibliography

Recommended textbooks:

Pertinent lecture notes and exercises with solutions are made available on the course web site to registered students (on Elly portal) the day before the lecture. These notes are meant to support the lecture developed in classroom on the chalkboard. Hence, they are not self -contained for students not attending classes. These students should refer to one of the textbook listed below.

For a comprehensive treatment of the subject please refer to the following textbooks, which the course draws inspiration from:
- F. Vahid, Digital Design, John Wiley & Sons, 2007.
- J.F. Wakerly, Digital Design: Principles and Practice, 4th Edition, Prentice-Hall, 2005.

Additional textbooks (to probe further specific topics or to look for exercises):
- C. Bolchini, C. Brandolese, F. Salice, D. Sciuto, Reti Logiche, Apogeo, 2004.
- M.M. Mano, Digital Design, 3/E, Prentice Hall, 2002.
- R.H. Katz, Contemporary Logic Design, 1st Edition, Addison Wesley, 1994.
- R. Laschi, Reti Logiche, Esculapio, Bologna, 1994.

The course covers a very classical computer engineering discipline. A number of textbooks dealing with the subject are available in the Engineering School Library, in Italian as well as in English.

Teaching methods

The course comprises about 56 hours of teaching activity (32 hours of lectures with examples + 24 hours of guided exercises in classroom, or industrial seminars, or laboratory demonstration). Lectures and examples are delivered in classroom using chalkboard, overhead projector, and/or computer slides as needed. A large fraction of lecture time is devoted to design activities, typically carried out on the main chalkboard to include design suggestions from the more lively students attending the class.
A 2 hour seminar or lab is planned to introduce digital design techniques with programmable logic components using industrial CAD tools (schematic entry, VHDL, digital simulation, project mapping on assigned programmable components).

During the semester, two midterms are administered to keep students on pace with the course and exempt them from the final exam. Assignments are proposed at the end of each lecture on the lecture topics. Assignment solutions are not turned in by students nor individually corrected; rather, their solution is discussed at the beginning of the next lecture.

Assessment methods and criteria

Recommended mode: Two written midterms (90 minutes each) at half and end of lecturing period. In this case, the final mark is the average of the midterm marks.
Otherwise: Comprehensive written test (2 hours) taken at official exam sessions.

Written tests (as well as midterms) always include 4-6 exercises requiring the design and analysis of several types of digital circuits, covering all the course topics. Exercises are meant to ascertain the student’s ability to apply the learned design techniques, although they may also probe indirectly into theory for their solution. Hence, theory must be known and used to solve the proposed design and analysis problems. At least one question will probe problem-solving skills and will require the student to factor the solution into smaller sub-parts to be composed in a coherent digital system.

Other information

Course web site available at: http://elly.dii.unipr.it for registered students.
Teaching material is published on the web site as course progresses.