Learning objectives
The course provides introductory elements to understanding the operation of digital systems.
At the end of the course, the student will acquire a functional view of digital systems.
Furthermore, they will become familiar with some of the design and simulation tools that will allow them to independently complete analysis and synthesis activities of basic digital circuits, as well as simple project experiences.
Prerequisites
no
Course unit content
- Introduction to the basic concepts of information theory such as: logical abstraction model, signals, sensors and actuators, logic functions.
- Design of combinational logic networks using elementary building blocks.
- Design and synthesis of combinatorial networks.
- Complex circuit blocks
- Design and synthesis of sequential logics
- Digital system architectures
Laboratory activities:
- The flow of digital circuit design
- The VHDL hardware description language
- Description and simulation of combinational and sequential digital circuits using VHDL.
Full programme
Basic concepts of Information theory (6h)
- Model and levels of logical abstraction
- Signals: analog and digital representations
- Transducers: sensor and actuator
- A/D and D/A conversion
- Binary numerical system
- Logic function
- Concepts of black-box, I/O, processing, memory, and control
Fundamentals of combinational logic networks (6h)
- Logical ports
- Logical operations and expressions
- Boolean algebra
- De Morgan theorems
Synthesis of digital circuits (10 h)
- Truth table
- Canonical functions
- Maps of Karnaugh
- Logic minimization
- Problem of delays and glitches
Combinational building blocks (4h)
- Multiplexer, Decoder, Half Adder, Full Adder
Fundamentals of sequential logical networks (16h)
- Latch and Flip-Flop
- Synthesis of synchronous networks
- Finite State Machines
- Timing of sequential logics
Digital Architecture (6h)
- Arithmetic circuits, counters, shift registers
- ROM, RAM
- ALU
- Logical matrices: PAL and PLA
- Programmable circuits (FPGA)
- Functional scheme of a uProcessor
Laboratory activities:
- Introduction to VHDL
- The fundamental constructs of the language
- Implementation and simulation of digital circuits
- Basic modules of both combinational and sequential digital design (logic gates, logic networks, MUX, adders, D flip-flops, FFT, Shift Register, counters, finite state machines)
Bibliography
-A. Marcovitz,”Introduction to Logic Design”, 3rd edition, McGrawHill, 2009
- S. L. Harris, D.M. Harris, “Sistemi digitali e architettura dei calcolatori”, Zanichelli editore
- M. Morris Mano, C.R. Kime, "Reti Logiche", Pearson Prentice Hall
Teaching methods
The course is structured in oral lessons that form the basis for understanding and critical processing of the topics covered. Exercises are regularly proposed to develop the students' application and design skills.
In the laboratory activities, the basic techniques for computer-aided design and simulation using the VHDL hardware description language will be presented.
Assessment methods and criteria
The exam includes an evaluation of laboratory activity and a written test with exercises on the topics covered during the course.
The test is divided into two parts:
First test: focused on combinatorial logic and laboratory activities.
Second test: dedicated to sequential logic.
Both tests are conducted on the same day, one immediately following the other.
Passing the first test is a prerequisite for accessing the second test.
Other information
Further information is available on the website http://elly2024.dia.unipr.it/
2030 agenda goals for sustainable development
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